Logic Sniffer - Revision history

PhilippeTeuwen at 19:11, 28 September 2014

2014-09-28T19:11:40Z

← Older revision		Revision as of 19:11, 28 September 2014
Line 85:		Line 85:
	We have nicely all the ATR in one window		We have nicely all the ATR in one window
	<br>Trying Tools / UART analyzer		<br>Trying Tools / UART analyzer
	Settings reported by Benjamin Schroedl:		<br>Settings reported by Benjamin Schroedl:
	* Set Rx on channel 2		* Set Rx on channel 2
	* 8E2		* 8E2

PhilippeTeuwen: /* Test on Smartcard Terminal communication */

2014-09-28T19:11:18Z

Test on Smartcard Terminal communication

← Older revision		Revision as of 19:11, 28 September 2014
Line 85:		Line 85:
	We have nicely all the ATR in one window		We have nicely all the ATR in one window
	<br>Trying Tools / UART analyzer		<br>Trying Tools / UART analyzer
			Settings reported by Benjamin Schroedl:
	* Set Rx on channel 2		* Set Rx on channel 2
			* 8E2
	* 8E1, invert
			* Idle Level High
	=> all got wrong :-(
			* Bit encoding High
			* LSB first


	I also tried serial trigger but I don't understand how it considers baudrate and of course it doesn't work		I also tried serial trigger but I don't understand how it considers baudrate and of course it doesn't work

PhilippeTeuwen: /* Firmware upgrade */

2011-03-01T12:39:46Z

Firmware upgrade

← Older revision		Revision as of 12:39, 1 March 2011
Line 31:		Line 31:
	Note there is a typo in the script: to enter PIC programming mode, you need a jumper between PGC & '''PGD''' on the ICSP header & press reset.		Note there is a typo in the script: to enter PIC programming mode, you need a jumper between PGC & '''PGD''' on the ICSP header & press reset.
	<br>Jumper doesn't need to be present all the time, you just need to shortcut PGC & PGD during reset (easier if you didn't solder a header on it)		<br>Jumper doesn't need to be present all the time, you just need to shortcut PGC & PGD during reset (easier if you didn't solder a header on it)

			UPDATE: all latest versions are now visible in [http://dangerousprototypes.com/docs/Open_Bench_Logic_Sniffer#Software this table]

	==Software==		==Software==

PhilippeTeuwen: /* Misc */

2010-12-06T14:39:05Z

Misc

← Older revision		Revision as of 14:39, 6 December 2010
Line 93:		Line 93:
	* Could we stop properly capture in RLE mode if there is no data anymore?		* Could we stop properly capture in RLE mode if there is no data anymore?
	* Support idle high in UART decoder?		* Support idle high in UART decoder?
			* There is now a [http://www.seeedstudio.com/depot/logic-sniffer-16bit-input-buffer-wing-p-721.html?cPath=61_68 daughter board] to have buffered input on the other 16 channels too

PhilippeTeuwen: /* Test on Smartcard Terminal communication */

2010-11-24T20:29:45Z

Test on Smartcard Terminal communication

← Older revision		Revision as of 20:29, 24 November 2010
Line 86:		Line 86:
	* 8E1, invert		* 8E1, invert
	=> all got wrong :-(		=> all got wrong :-(
	<br>It seems it cannot understand idle high

	I also tried serial trigger but I don't understand how it considers baudrate and of course it doesn't work		I also tried serial trigger but I don't understand how it considers baudrate and of course it doesn't work

	==Misc==		==Misc==
	* Could we disable/GND unused probes of a group to save space in RLE mode?		* Could we disable/GND unused probes of a group to save space in RLE mode?

PhilippeTeuwen: /* Firmware upgrade */

2010-11-24T18:06:41Z

Firmware upgrade

@@ Line 14: / Line 14: @@
  ATTRS{idVendor}=="04d8" ATTRS{idProduct}=="fc92" ENV{ID_MM_DEVICE_IGNORE}="1"
 ===Firmware upgrade===
 ==Software==
 I tried this fork: http://www.lxtreme.nl/ols/ which is the official client for this board

PhilippeTeuwen: /* Usage */

2010-11-24T16:50:05Z

Usage

← Older revision		Revision as of 16:50, 24 November 2010
Line 71:		Line 71:

	I also tried serial trigger but I don't understand how it considers baudrate and of course it doesn't work		I also tried serial trigger but I don't understand how it considers baudrate and of course it doesn't work
			==Misc==
			* Could we disable/GND unused probes of a group to save space in RLE mode?
			* Could we stop properly capture in RLE mode if there is no data anymore?
			* Support idle high in UART decoder?

PhilippeTeuwen: /* Usage */

2010-11-24T15:33:06Z

Usage

← Older revision		Revision as of 15:33, 24 November 2010
Line 42:		Line 42:
	** Problem of never ending if no changes occur		** Problem of never ending if no changes occur
	** Better to ground the unused probes of one group to not loose space recording noise		** Better to ground the unused probes of one group to not loose space recording noise
			===Test on Smartcard <> Terminal communication===

			Trying to sniff a T=0 communication:
			* channel 0: CLK (actually at the sampling rate given below we're largely undersampling the clock which is about 1MHz)
			* channel 1: RST
			* channel 2: I/O

			All signals are low before card is inserted
			<br>I/O is high when idle
			<br>We sample @ 200kHz and trig on the RST signal
			* 3/97
			* complex
			* Stage1
			** Immediately, //
			** Mask vv.
			** Value v.. (RST down, IO up idle)
			* Stage2
			** On level1, //
			** Mask vv.
			** Value vv. (RST up, IO up idle)
			** Action: start capture
			We have nicely all the ATR in one window
			<br>Trying Tools / UART analyzer
			* Set Rx on channel 2
			* 8E1, invert
			=> all got wrong :-(
			<br>It seems it cannot understand idle high

			I also tried serial trigger but I don't understand how it considers baudrate and of course it doesn't work

PhilippeTeuwen: /* Usage */

2010-11-24T14:40:54Z

Usage

← Older revision		Revision as of 14:40, 24 November 2010
Line 32:		Line 32:
	* Number scheme inside/outside in SUMP client refers to number scheme printed on PCB		* Number scheme inside/outside in SUMP client refers to number scheme printed on PCB
	** Default: inside: pin0 is at opposite of RESET button, on buffered probe header (up to 5V)		** Default: inside: pin0 is at opposite of RESET button, on buffered probe header (up to 5V)
	** Warning Unbuffered wing header: up to 3.3V
	* External clock source in SUMP: through the CKI header (see the 4 holes in the middle of the PCB)		* External clock source in SUMP: through the CKI header (see the 4 holes in the middle of the PCB)
	* Limits:		* Limits:
			** 5V on buffered probe header / 3.3V on unbuffered wing header
	** 200MHz with 2 groups, no noise filter		** 200MHz with 2 groups, no noise filter
	** 1 group: 24K / 2 groups: 12K / 4 groups: 6K		** 1 group: 24K / 2 groups: 12K / 4 groups: 6K
	** RLE (compression): 4 groups only (v2.12) / all (v2.11)~~. Problem of never ending if no changes occur~~.		** RLE (compression): 4 groups only (v2.12) / all (v2.11).
	* Trigger before/after ration: samples before/after the trigger		* Trigger before/after ration: samples before/after the trigger
			* RLE
			** Problem of never ending if no changes occur
			** Better to ground the unused probes of one group to not loose space recording noise

PhilippeTeuwen: /* Software */

2010-11-24T14:23:58Z

Software

← Older revision		Revision as of 14:23, 24 November 2010
Line 28:		Line 28:
	* Make sure that the Device is set to "OpenBench Logic Sniffer".		* Make sure that the Device is set to "OpenBench Logic Sniffer".
	* Click the capture button and type in your OLS port path in the "Analyzer port" field (i.e. /dev/OpenLogicSniffer if you installed it as I did). Leave the other settings at their default value for now and click "Capture".		* Click the capture button and type in your OLS port path in the "Analyzer port" field (i.e. /dev/OpenLogicSniffer if you installed it as I did). Leave the other settings at their default value for now and click "Capture".
			==Usage==
			See [http://dangerousprototypes.com/docs/Logic_Sniffer_101 101] and [http://dangerousprototypes.com/docs/Logic_Sniffer_102 102] tutos
			* Number scheme inside/outside in SUMP client refers to number scheme printed on PCB
			** Default: inside: pin0 is at opposite of RESET button, on buffered probe header (up to 5V)
			** Warning Unbuffered wing header: up to 3.3V
			* External clock source in SUMP: through the CKI header (see the 4 holes in the middle of the PCB)
			* Limits:
			** 200MHz with 2 groups, no noise filter
			** 1 group: 24K / 2 groups: 12K / 4 groups: 6K
			** RLE (compression): 4 groups only (v2.12) / all (v2.11). Problem of never ending if no changes occur.
			* Trigger before/after ration: samples before/after the trigger